Table 3 from Modelling and characterization on wafer to wafer hybrid bonding technology for 3D IC packaging | Semantic Scholar (2024)

Skip to search formSkip to main contentSkip to account menu

Semantic ScholarSemantic Scholar's Logo
@article{Ji2019ModellingAC, title={Modelling and characterization on wafer to wafer hybrid bonding technology for 3D IC packaging}, author={Lin Ji and Fa Xing Che and Hongmiao Ji and H.Y. Li and Masaya Kawano}, journal={2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)}, year={2019}, pages={87-94}, url={https://api.semanticscholar.org/CorpusID:212648221}}
  • L. Ji, F. Che, M. Kawano
  • Published in Electronic Packaging… 1 December 2019
  • Engineering, Materials Science

For Wafer to Wafer Hybrid Bonding (W2W-HB) technology, warpage mitigation and precise Cu to Cu bonding are required to ensure a robust bonding integrity. This paper documents a numerical methodology using the Finite Element Analysis (FEA) tool to investigate the impact of various design and process parameters on two-layer wafer to wafer bonding. The risk of poor bonding integrity associated with inappropriate design and process parameters selected are discussed. The attempt of this paper is to…

17 Citations

Highly Influential Citations

1

Background Citations

10

Methods Citations

7

Tables from this paper

  • table 1
  • table 2
  • table 3
  • table 4
  • table 5
Bonding integrity enhancement in wafer to wafer fine pitch hybrid bonding by advanced numerical modelling
    L. JiF. CheH. JiHong Yu LiM. Kawano

    Engineering, Materials Science

    2020 IEEE 70th Electronic Components and…

  • 2020

This paper presents a 3D advanced numerical modelling methodology to simulate the bonding process for fine pitch TSV wafers using wafer to wafer hybrid bonding (W2W-HB) technology from

  • 19
Wafer-to-Wafer Hybrid Bonding Development by Advanced Finite Element Modeling for 3-D IC Packages
    L. JiF. CheH. JiHong Yu LiM. Kawano

    Engineering, Materials Science

    IEEE Transactions on Components, Packaging and…

  • 2020

This article focuses on the 3-D modeling methodology development of the wafer-to-wafer hybrid bonding (W2W-HB) annealing process, and the resulting debonding risk for both Cu and dielectric bonding is assessed by comparing the peak interfacial peeling stresses for various scenarios.

  • 25
Wafer Level High Density Hybrid Bonding for High Performance Computing
    H. JiL. JiF. CheHong-Yu LiK. ChuiM. Kawano

    Engineering, Materials Science

    2020 IEEE International Symposium on the Physical…

  • 2020

This article investigates the W2W alignment accuracy of hybrid bonding process, and studies the defects in the unbonded zone around the Cu pad bonding area.

  • 9
Wafer Level Back to Back Hybrid Bonding for Multiple Wafer Stacking
    H. LiM. KawanoL. JiH. JiC. S. Lim

    Engineering, Materials Science

    2020 IEEE 22nd Electronics Packaging Technology…

  • 2020

This paper describes the demonstration of a 4-layer wafer stack using a combination of face-to-face and back-to-back, wafer-to-wafer hybrid bonding process. Details of process flow, process

  • 4
Wafer Warpage Optimization Via Finite Element Analysis for a 3D Chiplet Package
    L. JiT. ChaiSharon Pei Siang Lim

    Engineering, Materials Science

    2022 IEEE 24th Electronics Packaging Technology…

  • 2022

This paper presents a numerical study using Finite Element Analysis modelling approach to predict the wafer warpage during a 3D chiplet package fabrication process. To mitigate the wafer warpage,

  • 2
Numerical Simulations to Assist Chip-to-Wafer Hybrid Bonding Process Development
    Sasi Kumar TippabhotlaL. JiC. Choong

    Engineering, Materials Science

    2022 IEEE 24th Electronics Packaging Technology…

  • 2022

Development of chip to wafer hybrid bonding (C2W-HB) process is essential to achieve direct bonding of fine pitch (≤ 10 μm) Cu interconnects for heterogeneous integration. As the polymer mechanical

  • 2
Research on simulation of Cu/SiO2 hybrid bonding process and interface failure mechanism by Finite Element Analysis
    Haozhong WangHongtao ChenJunshan XiangXiaofeng Yang

    Engineering, Materials Science

    2023 24th International Conference on Electronic…

  • 2023

Cu/SiO2 hybrid bonding technology is proposed as a solution for the increasing demand of 3D packaging for higher I/O density and higher bandwidth applications. In this paper, a numerical approach to

Simulation and Experimental Analysis of Thermomechanical Stress Around Interconnects for W2W Hybrid Bonding
    Guoqiang ZhaoYanping ZengYi Zhao

    Engineering, Materials Science

    2024 IEEE 10th Electronics System-Integration…

  • 2024

In this work, the influence of the most important parameters on stress around hybrid bonding units is explored by 3D finite element modeling approach. The impact of pad shape, size, pitch, density,

Recent progress on bumpless Cu/SiO2 hybrid bonding for 3D heterogeneous integration
    Ge LiQiushi KangF. NiuChenxi Wang

    Engineering, Materials Science

    Microelectronics International

  • 2022

PurposeBumpless Cu/SiO2 hybrid bonding, which this paper aims to, is a key technology of three-dimensional (3D) high-density integration to promote the integrated circuits industry’s continuous

  • 6
Evaluation of C2W hybrid bonding performance with SiO2/SiCN passivation layers at the interface using finite element simulations
    Sasi Kumar TippabhotlaL. JiC. Choong

    Engineering, Materials Science

    2023 IEEE 25th Electronics Packaging Technology…

  • 2023

Advanced computing applications such as internet-of-things, autonomous driving and artificial intelligence require integrated chips with fine pitch interconnections. Heterogeneous integration (HI) of

  • 1

...

...

4 References

Development of Wafer-Level Warpage and Stress Modeling Methodology and Its Application in Process Optimization for TSV Wafers
    F. CheH. LiXiaowu ZhangShan GaoK. Teo

    Engineering, Materials Science

    IEEE Transactions on Components, Packaging and…

  • 2012

Through-silicon via (TSV) technology has been widely investigated recently for 3-D electronic packaging integration. Reducing TSV wafer warpage is one of the most challenging concerns for

  • 49
Study on Cu Protrusion of Through-Silicon Via
    F. CheW. N. PutraA. HeryantoA. TriggXiaowu ZhangC. Gan

    Engineering, Materials Science

    IEEE Transactions on Components, Packaging and…

  • 2013

The through-silicon via (TSV) approach is essential for 3-D integrated circuit (3-DIC) packaging technology. TSV fabrication process, however, is still facing several challenges. One of the widely

  • 74
  • Highly Influential
  • PDF

Related Papers

Showing 1 through 3 of 0 Related Papers

    Table 3 from Modelling and characterization on wafer to wafer hybrid bonding technology for 3D IC packaging | Semantic Scholar (6)

    Table 3. The design and process parameters considered in this study are listed in Table 4 and Table 5, respectively. It should be noted that for the sake of simplicity, only 10µm thick Si wafer carrier is modelled. Such…

    Published in Electronic Packaging Technology Conference 2019

    Modelling and characterization on wafer to wafer hybrid bonding technology for 3D IC packaging

    L. JiF. CheH. JiH.Y. LiM. Kawano

    Figure 3 of 5

    Table 3 from Modelling and characterization on wafer to wafer hybrid bonding technology for 3D IC packaging | Semantic Scholar (2024)
    Top Articles
    Latest Posts
    Recommended Articles
    Article information

    Author: Jeremiah Abshire

    Last Updated:

    Views: 6173

    Rating: 4.3 / 5 (74 voted)

    Reviews: 89% of readers found this page helpful

    Author information

    Name: Jeremiah Abshire

    Birthday: 1993-09-14

    Address: Apt. 425 92748 Jannie Centers, Port Nikitaville, VT 82110

    Phone: +8096210939894

    Job: Lead Healthcare Manager

    Hobby: Watching movies, Watching movies, Knapping, LARPing, Coffee roasting, Lacemaking, Gaming

    Introduction: My name is Jeremiah Abshire, I am a outstanding, kind, clever, hilarious, curious, hilarious, outstanding person who loves writing and wants to share my knowledge and understanding with you.